发明名称 |
Process for fabricating silicon-on-nothing MOSFETs |
摘要 |
A semiconductor device includes a gate stack; an air-gap under the gate stack; a semiconductor layer vertically between the gate stack and the air-gap; and a first dielectric layer underlying and adjoining the semiconductor layer. The first dielectric layer is exposed to the air-gap. |
申请公布号 |
US8106468(B2) |
申请公布日期 |
2012.01.31 |
申请号 |
US20080143612 |
申请日期 |
2008.06.20 |
申请人 |
WANG TA-WEI;CHANG CHIH-SHENG;TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. |
发明人 |
WANG TA-WEI;CHANG CHIH-SHENG |
分类号 |
H01L21/764 |
主分类号 |
H01L21/764 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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