发明名称 |
Geometry based electrical hotspot detection in integrated circuit layouts |
摘要 |
A method of failure detection of an integrated circuit (IC) layout includes determining a critical path distance between a first geometric feature of the IC layout and a second geometric feature of the IC layout; and comparing the determined critical path distance to a defined minimum critical path distance between the first and second geometric features, wherein the defined minimum critical path distance corresponds to a desired electrical property of the IC layout, independent of any geometric-based ground rule minimum distance for the IC layout; identifying any determined critical path distances that are less than the defined minimum critical path distance as a design violation; and modifying the IC layout by eliminating the identified design violations. |
申请公布号 |
US8108803(B2) |
申请公布日期 |
2012.01.31 |
申请号 |
US20090603594 |
申请日期 |
2009.10.22 |
申请人 |
HENG FOOK-LUEN;OUYANG XU;SONG YUNSHENG;WANG YUN-YU;INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
HENG FOOK-LUEN;OUYANG XU;SONG YUNSHENG;WANG YUN-YU |
分类号 |
G06F17/50 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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地址 |
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