发明名称 |
Balancing NFET and PFET performance using straining layers |
摘要 |
An integrated circuit structure includes a substrate and at least one pair of complementary transistors on or in the substrate. The pair of complementary transistors comprises a first transistor and a second transistor. The structure also includes a first stress-producing layer on the first transistor and the second transistor, and a second stress-producing layer on the first stress-producing layer over the first transistor and the second transistor. The first stress-producing layer applies tensile strain force on the first transistor and the second transistor. The second stress-producing layer applies compressive strain force on the first stress-producing layer, the first transistor, and the second transistor. |
申请公布号 |
US8106462(B2) |
申请公布日期 |
2012.01.31 |
申请号 |
US20100687374 |
申请日期 |
2010.01.14 |
申请人 |
CHEN XIANGDONG;LI WEIPENG;MOCUTA ANDA C.;PARK DAE-GYU;SHERONY MELANIE J.;STEIN KENNETH J.;YIN HAIZHOU;ARNAUD FRANCK;HAN JIN-PING;KANG LAEGU;LEE YONG MENG;TEH YOUNG WAY;THEAN VOON-YEW;ZHANG DA;INTERNATIONAL BUSINESS MACHINES CORPORATION;FREESCALE SEMICONDUCTOR, INC.;INFINEON TECHNOLOGIES NORTH AMERICA CORP.;CHARTERED SEMICONDUCTOR MANUFACTURING LTD. |
发明人 |
CHEN XIANGDONG;LI WEIPENG;MOCUTA ANDA C.;PARK DAE-GYU;SHERONY MELANIE J.;STEIN KENNETH J.;YIN HAIZHOU;ARNAUD FRANCK;HAN JIN-PING;KANG LAEGU;LEE YONG MENG;TEH YOUNG WAY;THEAN VOON-YEW;ZHANG DA |
分类号 |
H01L27/092 |
主分类号 |
H01L27/092 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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