发明名称 |
Apparatus for NBTI prediction |
摘要 |
An apparatus comprises a circuit for measuring a gate leakage current of a plurality of transistors. A circuit is provided to apply heat to gates of the plurality of transistors. A circuit is provided to apply a single stress bias voltage to the plurality of transistors for a stress period t. The stress bias voltage is sufficient to cause a 10% degradation in a drive current of the transistor within the stress period t. A processor is provided for estimating a negative bias temperature instability (NBTI) lifetime τ of the transistor based on a relationship between the gate leakage current and one or more of the group consisting of gate voltage, gate length, gate temperature, and gate width of the plurality of transistors. The relationship is determined from data observed while applying the single stress bias voltage. |
申请公布号 |
US8106461(B2) |
申请公布日期 |
2012.01.31 |
申请号 |
US20100887615 |
申请日期 |
2010.09.22 |
申请人 |
CHEN CHIA-LIN;LIN YI-MIAW;CHEN MING-CHEN;TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. |
发明人 |
CHEN CHIA-LIN;LIN YI-MIAW;CHEN MING-CHEN |
分类号 |
H01L29/40 |
主分类号 |
H01L29/40 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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