发明名称 Semiconductor memory and memory system
摘要 A plurality of cell arrays are assigned different addresses. An access information unit holds access enable information indicating the number of the cell arrays to be simultaneously activated. An array control unit activates at least one of the cell arrays corresponding to the access enable information, in response to an access request, and forcibly activates at least one of the cell arrays not corresponding to the access enable information, in response to a forced access request. Consequently, it is possible to activate the inactivated cell array not corresponding to the access enable information before the supply of the access request. Therefore, even when the number of the cell arrays to be simultaneously activated is small, it is possible to execute access operations without interruption. As a result, it is possible to access the cell arrays with minimum power consumption without lowering access efficiency.
申请公布号 US8107313(B2) 申请公布日期 2012.01.31
申请号 US20080238900 申请日期 2008.09.26
申请人 KOBAYASHI HIROYUKI;FUJITSU SEMICONDUCTOR LIMITED 发明人 KOBAYASHI HIROYUKI
分类号 G06F12/00 主分类号 G06F12/00
代理机构 代理人
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