发明名称 |
Processor for controlling tread switching |
摘要 |
The multi-threading changeover control apparatus of the present invention changes over threads in an information processing device in which a multi-threading method is used, and comprises a thread changeover request unit outputting a thread changeover request signal after a cache miss occurs in which an instruction to be fetched is not stored when the instruction is fetched or a thread execution priority order change request unit outputting a thread execution priority order change request signal. |
申请公布号 |
US8108859(B2) |
申请公布日期 |
2012.01.31 |
申请号 |
US20040967235 |
申请日期 |
2004.10.19 |
申请人 |
YOKOI MEGUMI;UKAI MASAKI;FUJITSU LIMITED |
发明人 |
YOKOI MEGUMI;UKAI MASAKI |
分类号 |
G06F9/46;G06F12/08;G06F9/38;G06F9/44;G06F9/48;G06F13/00;G06F15/00 |
主分类号 |
G06F9/46 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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