发明名称 Method and computer for reducing power consumption of a memory
摘要 Provided is a method of managing, in a computer including a processor and a memory that stores information referred to by the processor, the memory. The memory includes a plurality of memory banks, respective power supplies of which are independently controlled. The respective memory banks include a plurality of physical pages. The method includes collecting the physical pages having same degrees of use frequencies in the same memory bank, selecting the memory bank, the power supply for which is controlled, on the basis of the use frequency, and controlling the power supply for the memory bank selected.
申请公布号 US8108629(B2) 申请公布日期 2012.01.31
申请号 US20070707114 申请日期 2007.02.16
申请人 SHIMIZU MASAAKI;SUKEGAWA NAONOBU;HITACHI, LTD. 发明人 SHIMIZU MASAAKI;SUKEGAWA NAONOBU
分类号 G06F12/00;G06F13/00;G06F13/28 主分类号 G06F12/00
代理机构 代理人
主权项
地址