发明名称 Memory device with data paths for outputting compressed data
摘要 A memory device is provided. The memory device includes a plurality of memory array banks, a bus, a data buffer, and four data paths. The data buffer provides data from the memory array banks to an external node. The first data path includes a first compression module for compressing the data from the memory array banks to the bus. The second data path transmits the data from the memory array banks to the bus. The third data path includes a second compression module for compressing data from the bus to the data buffer. The fourth data path transmits the data from the bus to the data buffer.
申请公布号 US8107307(B2) 申请公布日期 2012.01.31
申请号 US20100699905 申请日期 2010.02.04
申请人 CHOU MIN-CHUNG;ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. 发明人 CHOU MIN-CHUNG
分类号 G11C7/00 主分类号 G11C7/00
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