| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a semiconductor storage device which can reduce wiring resistance of bit lines. <P>SOLUTION: The semiconductor storage device comprises a plurality of memory cell blocks each including a plurality of memory cell units each having a plurality of memory cells, the memory cell units being disposed along a first direction at predetermined intervals and the memory cell blocks being disposed along a second direction that intersects the first direction, a plurality of first wiring extending in the second direction and disposed at predetermined intervals, a second wiring provided in at least one of the locations above the first wiring and below the first wiring, and contacts provided at both ends of the second wiring in the second direction for connecting the first wiring and the second wiring. A width dimension of the second wiring along the first direction is longer than a width dimension of the first wiring along the first direction. <P>COPYRIGHT: (C)2012,JPO&INPIT |
