| 摘要 |
A method and data processing system enables scheduling of atomic operations within a Peripheral Component Interconnect Express (PCIe) architecture during page migration. In at least one embodiment, firmware detects the activation of a page migration operation and sets a migration bit in the page table. When the PCIe Host Bridge (PHB) receives an atomic operation, the PHB checks the migration bit associated with the memory page targeted by the atomic operation and if the migration bit is set, the PHB buffers the atomic operation and sets an atomic operation stall (AOS) bit associated with the buffer. The atomic operation is stalled until the migration bit is reset, at which time the PHB resets the AOS bit of the buffer. The atomic operations are permitted to continue when the migration bit of the target memory page is not set, and along with DMA operations, may bypass other stalled atomic operations.
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