发明名称 SELF-ALIGNED SILICIDATION FOR REPLACEMENT GATE PROCESS
摘要 A semiconductor device is formed with low resistivity self aligned silicide contacts with high-K/metal gates. Embodiments include postponing silicidation of a metal layer on source/drain regions in a silicon substrate until deposition of a high-K dielectric, thereby preserving the physical and morphological properties of the silicide film and improving device performance. An embodiment includes forming a replaceable gate electrode on a silicon-containing substrate, forming source/drain regions, forming a metal layer on the source/drain regions, forming an ILD over the metal layer on the substrate, removing the replaceable gate electrode, thereby forming a cavity, depositing a high-K dielectric layer in the cavity at a temperature sufficient to initiate a silicidation reaction between the metal layer and underlying silicon, and forming a metal gate electrode on the high-K dielectric layer.
申请公布号 US2012018816(A1) 申请公布日期 2012.01.26
申请号 US20100843350 申请日期 2010.07.26
申请人 SEN INDRADEEP;KAMMLER THORSTEN;KNORR ANDREAS;SULTAN AKIF;GLOBALFOUNDRIES INC. 发明人 SEN INDRADEEP;KAMMLER THORSTEN;KNORR ANDREAS;SULTAN AKIF
分类号 H01L29/78;H01L21/336 主分类号 H01L29/78
代理机构 代理人
主权项
地址