发明名称
摘要 <p>A method and apparatus for scaling frequency and operating voltage of at least one clock domain of a microprocessor. More particularly, embodiments of the invention relate to techniques to divide a microprocessor into clock domains and control the frequency and operating voltage of each clock domain independently of the others.</p>
申请公布号 JP4860624(B2) 申请公布日期 2012.01.25
申请号 JP20070533796 申请日期 2005.11.14
申请人 发明人
分类号 G06F1/32;G06F1/04;G06F9/38;G06F15/78 主分类号 G06F1/32
代理机构 代理人
主权项
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