摘要 |
<p>There is disclosed an integrated circuit (IC1; IC2; IC3) comprising a terminal (TML) for inputting or outputting signals from the integrated circuit, and a first ESD diode (D5; D8) connected to the terminal for protecting the terminal against ESD events. The integrated circuit further comprises a voltage buffer circuit (V_Buff) that is connected in parallel with the first ESD diode for maintaining a constant voltage across the first ESD diode.</p> |