发明名称 METHOD FOR FORMING 3D-INTERCONNECT STRUCTURES WITH AIRGAPS
摘要 Ultra-low capacitance interconnect structures, preferably Through Silicon Via (TSV) interconnects and methods for fabricating said interconnects are disclosed. The fabrication method comprises the steps of providing a substrate having a first main surface, producing at least one hollow trench-like structure therein from the first main surface, said trench-like structure surrounding an inner pillar structure of substrate material, depositing a dielectric liner which pinches off said hollow trench-like structure at the first main surface such that an airgap is created in the center of hollow trench-like structure and further creating a TSV hole and filling it at least partly with conductive material.
申请公布号 US2012013022(A1) 申请公布日期 2012.01.19
申请号 US201113183315 申请日期 2011.07.14
申请人 SABUNCUOGLU TEZCAN DENIZ;CIVALE YANN;BEYNE ERIC;IMEC 发明人 SABUNCUOGLU TEZCAN DENIZ;CIVALE YANN;BEYNE ERIC
分类号 H01L23/48;H01L21/28 主分类号 H01L23/48
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