发明名称 Method of Fine Patterning Semiconductor Device
摘要 For patterning during integrated circuit fabrication, an image layer is activated for forming a respective first type polymer block at each of two nearest activated areas. A layer of block copolymer is formed on the image layer, and a plurality of the first type polymer blocks and a plurality of second and third types of polymer blocks are formed on an area of the image layer between outer edges of the two nearest activated areas, from the block copolymer. At least one of the first, second, and third types of polymer blocks are removed to form a variety of mask structures.
申请公布号 US2012015527(A1) 申请公布日期 2012.01.19
申请号 US201113239555 申请日期 2011.09.22
申请人 YI SHI-YONG;KIM KYOUNG-TAEK;KIM HYUN-WOO;YOON DONG-KI 发明人 YI SHI-YONG;KIM KYOUNG-TAEK;KIM HYUN-WOO;YOON DONG-KI
分类号 H01L21/312 主分类号 H01L21/312
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