| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a solid-state imaging apparatus capable of suppressing generation of aliasing without increasing a chip area. <P>SOLUTION: A solid-state imaging apparatus having a first substrate on which a plurality of photoelectric conversion parts are arranged, and a second substrate on which a readout circuit and a parallel processing circuit are arranged, has a DC voltage supplying wire that supplies a DC voltage to the two or more parallel processing circuits. The DC voltage supplying wire is configured by connecting a first conductive pattern arranged on the first substrate with a second conductive pattern arranged on the second substrate electrically. <P>COPYRIGHT: (C)2012,JPO&INPIT |
