发明名称 Data transfer circuit and data transfer method
摘要 A port A request queue is configured with a port AQ0 to a port AQn for each of request types Q0 to Qn connected with a requester resource busy flag controller Q0 to a requester resource busy flag controller Qn, respectively. A port A resource checking unit of a port X arbiter unit gives instructions to the requester resource busy flag controller of the port AQ0 to turn a busy flag on when it is determined that a data request from the port AQ0 has difficulty in being output to a port X inter-port arbiter unit due to resources being busy as a result of referring to a resource information unit of a port X resource managing unit. The port AQ0 inhibits output of a data request as long as the busy flag is on.
申请公布号 US2012017017(A1) 申请公布日期 2012.01.19
申请号 US201113137983 申请日期 2011.09.22
申请人 NISHIYASHIKI MASARU;FUJITSU LIMITED 发明人 NISHIYASHIKI MASARU
分类号 G06F13/14 主分类号 G06F13/14
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