发明名称 |
LATERAL TRANSIENT VOLTAGE SUPPRESSOR FOR LOW-VOLTAGE APPLICATIONS |
摘要 |
A lateral transient voltage suppressor for low-voltage applications is disclosed. The suppressor comprises an N-type heavily doped substrate and at least two clamp diode structures horizontally arranged in the N-type heavily doped substrate. Each clamp diode structure further comprises a clamp well arranged in the N-type heavily doped substrate and having a first heavily doped area and a second heavily doped area. The first and second heavily doped areas respectively belong to opposite types. There is a plurality of deep isolation trenches arranged in the N-type heavily doped substrate and having a depth greater than depth of the clamp well. The deep isolation trenches can separate each clamp well. The present invention avoids the huge leakage current to be suitable for low-voltage application. |
申请公布号 |
US2012012974(A1) |
申请公布日期 |
2012.01.19 |
申请号 |
US20100837128 |
申请日期 |
2010.07.15 |
申请人 |
CHUANG CHE-HAO;LIN KUN-HSIEN;JIANG RYAN HSIN-CHIN |
发明人 |
CHUANG CHE-HAO;LIN KUN-HSIEN;JIANG RYAN HSIN-CHIN |
分类号 |
H01L29/06 |
主分类号 |
H01L29/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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