发明名称
摘要 PROBLEM TO BE SOLVED: To suppress a semiconductor memory device from having an erroneous reading operation due to an off-leak current. SOLUTION: The semiconductor memory device, which is provided with a reading circuit 12 in which a plurality of memory cells M111, M112, M113, M114 are connected in parallel to a bit line BL11 through a drain electrode and data written in a memory cell is read by applying power voltage VDD to each source electrode of the plurality of memory cells and detecting a current supplied from each memory cell, is provided with a power voltage applying circuit 13 applying power voltage VDD to only the source electrode of a memory cell being word-selected.
申请公布号 JP4854140(B2) 申请公布日期 2012.01.18
申请号 JP20010206327 申请日期 2001.07.06
申请人 发明人
分类号 G11C16/02;G11C16/06 主分类号 G11C16/02
代理机构 代理人
主权项
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