发明名称 Reproduced signal processor and video display
摘要 In a feedforward control type reproduced signal processor, a clock generator 1 changes a clock frequency, depending on a digital value set by a digital value generator 7. Therefore, power consumption of a system is optimized and control is facilitated. Moreover, when a frequency lock state is established in which a frequency ratio calculated by a frequency ratio calculator 3 satisfies a set condition, a modulation component having a small change is generated using a clock of a clock generator 1. Therefore, the digital value is updated with the modulation component, so that a change in clock frequency of the clock generator 1 gradually varies. As a result, the influence of the change in clock frequency on the response of a decoding process is reduced.
申请公布号 US8098972(B2) 申请公布日期 2012.01.17
申请号 US20070526746 申请日期 2007.11.01
申请人 OKAMOTO KOUJI;YAMAMOTO AKIRA;MOURI HIROKI;SHIRAKAWA YOSHINORI;PANASONIC CORPORATION 发明人 OKAMOTO KOUJI;YAMAMOTO AKIRA;MOURI HIROKI;SHIRAKAWA YOSHINORI
分类号 H04N5/932;H04N5/935 主分类号 H04N5/932
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