| 摘要 |
PURPOSE: A flash ROM device is provided to reduce precharge time by additionally comprising a precharge circuit which precharges a bit line. CONSTITUTION: First bit line precharge circuits(120) precharge a bit line selected according to a bit line selection signal and a first precharge control signal. Second bit line precharge circuits(130) precharge a sensing node in response to a second precharge control signal. Bit line selection circuits transmit voltage precharged in the sensing node to the bit line selected by the bit line selection signal. Rom latches(140) latch the potential of the sensing node in response to a first data loading signal and a second data loading signal. A control logic outputs the bit line selection signal, the first and second precharge control signals and the first and second data loading signals. |
