| 摘要 |
<p>PURPOSE: A semiconductor memory device is provided to improve the degree of integration by reducing the flat planes of a semiconductor device. CONSTITUTION: A plurality of sense amplifiers is arranged in the top part or lower part of a plurality of cell bit lines(BLC0,BLC1,BLC2,BLC3). A first sense amplifier is connected to a first cell bit line(BLC0). A second sense amplifier(SA1) is connected to a first cell bit line(BLC1). A third sense amplifier(SA2) is connected to a first cell bit line(BLC2). A fourth sense amplifier(SA3) is connected to a first cell bit line(BLC3). A plurality of output elements(OE0,OE1,OE2,OE3) is respectively connected to a plurality of the cell bit lines.</p> |
