| 摘要 |
According to one embodiment, a development system includes an instruction set simulator (ISS) and a checker. The ISS includes a central processing unit (CPU) model that simulates an execution program and a memory model as a work area of the processor model. The checker monitors execution of an access instruction, included in the execution program, on the memory model and, when a difference between a data length at the time of writing and a data length at the time of reading on the same spot is detected, notifies an execution spot at the time of detection as an endian dependent spot.
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