发明名称 |
Detection of Word-Line Leakage in Memory Arrays |
摘要 |
Techniques and corresponding circuitry are presented for the detection of wordline leakage in a memory array. In an exemplary embodiment, a capacitive voltage divider is used to translate the high voltage drop to low voltage drop that can be compared with a reference voltage to determine the voltage drop due to leakage. An on-chip self calibration method can help assure the accuracy of this technique for detecting leakage limit. |
申请公布号 |
US2012008384(A1) |
申请公布日期 |
2012.01.12 |
申请号 |
US20100833146 |
申请日期 |
2010.07.09 |
申请人 |
LI YAN;LEE DANA;HUYNH JONATHAN |
发明人 |
LI YAN;LEE DANA;HUYNH JONATHAN |
分类号 |
G11C16/06 |
主分类号 |
G11C16/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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