发明名称 MEMORY CONTROL DEVICE, MEMORY DEVICE, AND SHUTDOWN CONTROL METHOD
摘要 According to one embodiment, a memory control device includes a controller, a command queue module, a plurality of stage processors, and a skip module. The controller controls a data access command to a nonvolatile memory from a host. The command queue module queues a transfer request command corresponding to the data access command. The stage processors each perform stage processing related to the transfer request command queued by the command queue module. The skip module skips the stage processing by the stage processors in response to a shutdown command from the controller.
申请公布号 US2012011303(A1) 申请公布日期 2012.01.12
申请号 US201113086240 申请日期 2011.04.13
申请人 IWASAKI KIYOTAKA;SUZUKI HIROTAKA;FUKUDA TOHRU;MATSUYAMA MOTOHIRO;AOYAMA YOSHIMASA;KABUSHIKI KAISHA TOSHIBA 发明人 IWASAKI KIYOTAKA;SUZUKI HIROTAKA;FUKUDA TOHRU;MATSUYAMA MOTOHIRO;AOYAMA YOSHIMASA
分类号 G06F12/00 主分类号 G06F12/00
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