发明名称 DATA PROCESSING DEVICE AND DATA PROCESSING SYSTEM
摘要 <p>A data processing device (2) of the present invention is provided with: a central processing unit (CPU) which can be set at standby mode; a clock circuit (26) capable of generating a plurality of types of clock signals; a power supply circuit (24) which supplies the central processing unit with a power supply voltage and which is capable of switching the drive capability between a plurality of types when supplying the central processing unit with the power supply voltage; a storage unit (28) for storing information for selecting a clock signal to use when the central processing unit returns from standby mode to active mode; and a low power consumption state machine (STM) which is a control unit which, according to a trigger signal for causing the central processing unit to return from standby mode to active mode, causes the clock circuit to generate the selected clock signal on the basis of the stored information in the storage unit, and sets the drive capability of the power supply circuit to the drive capability which corresponds to the selected clock signal.</p>
申请公布号 WO2012004863(A1) 申请公布日期 2012.01.12
申请号 WO2010JP61521 申请日期 2010.07.07
申请人 RENESAS ELECTRONICS CORPORATION;TANIGAWA, KOICHI;SAKUGAWA, MAMORU;SAKURAI, TOMOHIRO 发明人 TANIGAWA, KOICHI;SAKUGAWA, MAMORU;SAKURAI, TOMOHIRO
分类号 G06F1/04;G06F1/32;G06F15/78 主分类号 G06F1/04
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