CIRCUIT FOR IMPROVING VOLTAGE-RESISTANCE OF DEVICES

摘要

A circuit for improving voltage-resistance of devices includes a first regulator (ZD1), a first diode (D1), an upper NMOS (Q2) and a lower NMOS (Q1). The gate of the upper NMOS (Q2) is connected to the cathode of the first diode (D1). The anode of the first diode (D1) is connected to the positive terminal of a power source (Vcc). The negative terminal of the power source (Vcc) is connected to the source of the lower NMOS (Q1). The gate of the upper NMOS (Q2) is connected to the source of the lower NMOS (Q1) through the first regulator (ZD1). The source of the upper NMOS (Q2) is connected to the drain of the lower NMOS (Q1). The drain of the upper NMOS (Q2) and the gate of the lower NMOS (Q1) respectively serve as a first output terminal (3) and a first input terminal (2) of the circuit. The source of the lower NMOS (Q1) serves as the common terminal (1) of a second input terminal and a second output terminal of the circuit. The power loss is reduced with the circuit.