| 摘要 |
<P>PROBLEM TO BE SOLVED: To prevent data from being destroyed in a semiconductor device having a latch circuit. <P>SOLUTION: A semiconductor device comprises: a first transistor P4 included in a latch circuit; a second transistor P1 that is included in the latch circuit, is formed in an well 40 that is shared with the first transistor P4, and has the same conductive type as the first transistor P4; and an well contact WC that is formed between the first transistor P4 and the second transistor P1 and connects the well 40 to a power supply. The charge occurring in the well 40 at the first transistor P4 side flows into the well contact WC, thereby preventing an influence of soft errors in the first transistor P4 from propagating to the second transistor P1. For this reason, a simultaneous occurrence of reversal of logic at two nodes in the latch circuit can be prevented, thereby preventing destruction of data. <P>COPYRIGHT: (C)2012,JPO&INPIT |
