| 摘要 |
Some embodiments include apparatus and methods having an output line, clock nodes to receive clock signals, the clock signals being out of phase with each other, and selector circuits to receive data in parallel. In at least one embodiment, the selector circuits are responsive to the clock signals to transfer the data serially to the output line. Such apparatus and methods can also include a control unit to influence a portion of a signal that represents at least a portion of the data at the output line. Additional apparatus and methods are described. |
