发明名称 |
Method of manufacturing a semiconductor integrated circuit device |
摘要 |
In a semiconductor integrated circuit device having plural layers of buried wirings, it is intended to prevent the occurrence of a discontinuity caused by stress migration at an interface between a plug connected at a bottom thereof to a buried wiring and the buried wiring. For example, in the case where the width of a first Cu wiring is not smaller than about 0.9μm and is smaller than about 1.44μm, and the width of a second Cu wiring and the diameter of a plug are about 0.18μm, there are arranged two or more plugs which connect the first wirings and the second Cu wirings electrically with each other. |
申请公布号 |
US8093723(B2) |
申请公布日期 |
2012.01.10 |
申请号 |
US201113098648 |
申请日期 |
2011.05.02 |
申请人 |
FUNAKOSHI TAKAKO;MURAKAMI EIICHI;YANAGISAWA KAZUMASA;TAKEUCHI KAN;AOKI HIDEO;YAMAGUCHI HIZURU;OSHIMA TAKAYUKI;TSUNOKUNI KAZUYUKI;OKUYAMA KOUSUKE;RENESAS ELECTRONICS CORPORATION |
发明人 |
FUNAKOSHI TAKAKO;MURAKAMI EIICHI;YANAGISAWA KAZUMASA;TAKEUCHI KAN;AOKI HIDEO;YAMAGUCHI HIZURU;OSHIMA TAKAYUKI;TSUNOKUNI KAZUYUKI;OKUYAMA KOUSUKE |
分类号 |
H01L23/48;H01L23/522;H01L21/768;H01L21/82;H01L21/8238;H01L23/52;H01L23/528;H01L23/532;H01L29/40 |
主分类号 |
H01L23/48 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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