| 摘要 |
A method for verifying functionality of a system-on-chip (SoC) comprises modeling a system block in first and second models at a first level and a second level lower than the first level, respectively. A stimulus transaction is generated at a first testbench at the first level. The stimulus transaction is transmitted from the first testbench to a second testbench at the second level. The stimulus transaction is transformed into a first response transaction, using the first model, at the first level. The stimulus transaction received at the second testbench is transformed into a second response transaction, using the second model, at the second level. The first and second response transactions are stored in first and second response queues, respectively. Functionality of the SoC at the first and second levels is verified based on a comparison at the first testbench between head entries of the first and second response queues. |
