发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 In a semiconductor memory circuit, a write voltage generation circuit receives an output voltage of a voltage boosting circuit to generate a write voltage to a memory cell. When the write voltage is low, a number-of-bits adjustment circuit increases the number of write bits of memory cells before write operation is performed. On the other hand, when the write voltage to a memory cell is high, the number-of-bits adjustment circuit decreases the number of write bits of memory cells before write operation is performed. The area and write time of the voltage boosting circuit can be reduced while the current supply capability of the voltage boosting circuit is efficiently used.
申请公布号 US2012002485(A1) 申请公布日期 2012.01.05
申请号 US201113233789 申请日期 2011.09.15
申请人 SUWA HITOSHI;MARUYAMA TAKAFUMI;ONO TAKASHI;NITTA TADASHI;NISHIKAWA KAZUYO;UEMINAMI MASAHIRO;PANASONIC CORPORATION 发明人 SUWA HITOSHI;MARUYAMA TAKAFUMI;ONO TAKASHI;NITTA TADASHI;NISHIKAWA KAZUYO;UEMINAMI MASAHIRO
分类号 G11C16/10;G11C16/14 主分类号 G11C16/10
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