发明名称 COMPUTER SYSTEM AND INTERRUPTION REQUEST PROCESSING METHOD
摘要 <P>PROBLEM TO BE SOLVED: To improve the processing efficiency of a central processing unit by reducing loads put on the interruption processing of the central processing unit. <P>SOLUTION: In a computer system 100, an interruption request processor M receives an interruption request notifying the end of predetermined processing outputted from a device D. The interruption request processor M determines whether or not the number of times of receiving the interruption request from the device D matches with a predetermined number F of times. The interruption request processor M outputs the execution request of the predetermined processing to the device D until the number of times of receiving the interruption request from the device D reaches the predetermined number F of times. When the number of times of receiving the interruption request from the device D matches with the predetermined number F of times, the interruption request processor M outputs the interruption request to a CPU 101. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012003325(A) 申请公布日期 2012.01.05
申请号 JP20100135297 申请日期 2010.06.14
申请人 FUJITSU LTD 发明人 ODATE NAOKI
分类号 G06F9/48;G06F13/24 主分类号 G06F9/48
代理机构 代理人
主权项
地址