发明名称 |
METHOD FOR FORMING IMPURITY REGION OF VERTICAL TRANSISTOR AND METHOD FOR FABRICATING VERTICAL TRANSISTOR USING THE SAME |
摘要 |
<P>PROBLEM TO BE SOLVED: To provide a method for forming impurity region of a vertical transistor enabling precise control of a position and a concentration of impurity and method for fabricating a vertical transistor using the same. <P>SOLUTION: The method includes forming an impurity ion junction region within a lower portion of a semiconductor substrate by ion injection to the semiconductor substrate, and forming a trench by etching the semiconductor substrate. The etching process is performed to remove a portion of the impurity ion junction region, so that a remaining portion of the impurity ion junction region is exposed to a lower side portion of the trench to serve as a buried bit line junction region. <P>COPYRIGHT: (C)2012,JPO&INPIT |
申请公布号 |
JP2012004562(A) |
申请公布日期 |
2012.01.05 |
申请号 |
JP20110128308 |
申请日期 |
2011.06.08 |
申请人 |
HYNIX SEMICONDUCTOR INC |
发明人 |
EUN YONG-SEOK;KIM TAE-GYUN;NOH KYONG-BONG;PARK EUN SHIL |
分类号 |
H01L27/108;H01L21/8242;H01L29/78 |
主分类号 |
H01L27/108 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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