发明名称 MEMORY AND MANUFACTURING METHOD THEREOF
摘要 <P>PROBLEM TO BE SOLVED: To provide a memory in which contact resistance between a lower electrode and a lower layer can be reduced and good switching characteristics can be obtained. <P>SOLUTION: A memory comprises a lower electrode 13 formed separately for each memory cell, a storage layer 14 formed on the lower electrode 13 and capable of recording information according to variations in a resistance value, an upper electrode 15 formed on the storage layer 14, the lower electrode 13 being configured such that a first layer 17 including metal and a second layer 18 including metal nitride and formed on the first layer 17 are laminated where only the first layer 17 is contact with a lower layer and only the second layer 18 is contact with the storage layer 14 as an upper layer, the storage layer 14 being formed commonly for a plurality of memory cells, and the upper electrode 15 being formed commonly for the plurality of memory cells. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012004243(A) 申请公布日期 2012.01.05
申请号 JP20100136460 申请日期 2010.06.15
申请人 SONY CORP 发明人 OTSUKA WATARU
分类号 H01L27/10;H01L27/105;H01L45/00;H01L49/00 主分类号 H01L27/10
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