摘要 |
The invention concerns a sigma-delta switched capacitor analog to digital converter (ADC) comprising: an input line (405) for receiving a signal to be converted; first, second and third inputs (408, 410, 412) for respectively receiving first, second and third test voltages (VA, VO, VB); and switching circuitry adapted to apply, during a test mode of said sigma-delta ADC, a ternary test signal to said input line by periodically selecting, based on a digital test control signal (Dtest), one of said first, second or third test voltages to be applied to said input line. |
申请人 |
INSTITUT POLYTECHNIQUE DE GRENOBLE;CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE;MIR, SALVADOR;STRATIGOPOULOS, HARALAMPOS;DUBOIS, MATTHIEU |
发明人 |
MIR, SALVADOR;STRATIGOPOULOS, HARALAMPOS;DUBOIS, MATTHIEU |