发明名称 Sequential deposition and anneal of a dielectic layer in a charge trapping memory device
摘要 Deposition and anneal operations are iterated to break a deposition into a number of sequential deposition-anneal operations to reach a desired annealed dielectric layer thickness. In one particular embodiment, a two step anneal is performed including an NH3 or ND3 ambient followed by an N2O or NO ambient. In one embodiment, such a method is employed to form a dielectric layer having a stoichiometry attainable with only a deposition process but with a uniform material quality uncharacteristically high of a deposition process. In particular embodiments, sequential deposition-anneal operations provide an annealed first dielectric layer upon which a second dielectric layer may be left substantially non-annealed.
申请公布号 US8088683(B2) 申请公布日期 2012.01.03
申请号 US20080080166 申请日期 2008.03.31
申请人 RAMKUMAR KRISHNASWAMY;LEVY SAGY;CYPRESS SEMICONDUCTOR CORPORATION 发明人 RAMKUMAR KRISHNASWAMY;LEVY SAGY
分类号 H01L21/4763 主分类号 H01L21/4763
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