发明名称 Integrated single spice deck sensitization for gate level tools
摘要 One embodiment of the present invention provides systems and techniques for generating a transistor-level description of a subcircuit. A user may want to simulate a subcircuit in a circuit using a transistor-level simulator, and one or more cells in the subcircuit may need to be sensitized so that the cells are in a desired state when the subcircuit is simulated. An embodiment modifies the subcircuit by inserting analog switches in front of the cells that need to be sensitized, so that the analog switches can be used to apply a sensitization sequence to the cells during the transistor-level simulation. The embodiment can then generate a transistor-level description of the modified subcircuit. Next, the transistor-level description of the subcircuit can be stored, thereby enabling the transistor-level simulator to simulate the subcircuit.
申请公布号 US8091049(B2) 申请公布日期 2012.01.03
申请号 US20080166630 申请日期 2008.07.02
申请人 ZEJDA JINDRICH;HANCHATE NARENDER;NAYAK RUPESH;DING LI;SYNOPSYS, INC. 发明人 ZEJDA JINDRICH;HANCHATE NARENDER;NAYAK RUPESH;DING LI
分类号 G06F17/50 主分类号 G06F17/50
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