发明名称 MEMORY DIES, STACKED MEMORIES, MEMORY DEVICES AND METHODS
摘要 Memory die, stacks of memory dies, memory devices and methods, such as those to construct and operate such die, stacks and/or memory devices are provided. One such memory die includes an identification configured to be selectively coupled to an external select connection node depending on how the die is arranged in a stack. The identification circuit can determine an identification of its respective memory die responsive to how, if coupled, the identification circuit is coupled to the external select connection node.
申请公布号 WO2011100444(A3) 申请公布日期 2011.12.29
申请号 WO2011US24368 申请日期 2011.02.10
申请人 MICRON TECHNOLOGY, INC.;NAKANISHI, TAKUYA;ITO, YUTAKA 发明人 NAKANISHI, TAKUYA;ITO, YUTAKA
分类号 G11C29/00;G06F11/30 主分类号 G11C29/00
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