发明名称 Shallow Junction Formation and High Dopant Activation Rate of MOS Devices
摘要 A semiconductor structure comprises a gate stack in a semiconductor substrate and a lightly doped source/drain (LDD) region in the semiconductor substrate. The LDD region is adjacent to a region underlying the gate stack. The LDD region comprises carbon and an n-type impurity, and the n-type impurity comprises phosphorus tetramer.
申请公布号 US2011316079(A1) 申请公布日期 2011.12.29
申请号 US201113228182 申请日期 2011.09.08
申请人 NIEH CHUN-FENG;KU KEH-CHIANG;CHENG NAI-HAN;CHEN CHI-CHUN;LIN LI-TE S.;TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 NIEH CHUN-FENG;KU KEH-CHIANG;CHENG NAI-HAN;CHEN CHI-CHUN;LIN LI-TE S.
分类号 H01L29/78 主分类号 H01L29/78
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