发明名称 Dual Loop Voltage Regulator with Bias Voltage Capacitor
摘要 A voltage regulator includes a regulator input connected to a reference voltage; a regulator output that outputs a regulated voltage to an electrical load; a first loop, the first loop configured to receive the reference voltage, the first loop outputting a bias voltage; a second loop, the second loop configured to receive the bias voltage as an input; and a bias voltage capacitor connected to a node between the first loop and the second loop.
申请公布号 US2011316506(A1) 申请公布日期 2011.12.29
申请号 US20100822507 申请日期 2010.06.24
申请人 BULZACCHELLI JOHN;MUENCH PAUL D.;SPERLING MICHAEL A.;TOPRAK-DENIZ ZEYNEP;INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 BULZACCHELLI JOHN;MUENCH PAUL D.;SPERLING MICHAEL A.;TOPRAK-DENIZ ZEYNEP
分类号 G05F1/10 主分类号 G05F1/10
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