| 摘要 |
Embodiments of the invention utilize a signal analyzer to monitor a data path, the data path to include a plurality of transactions to be executed via a processor. The signal analyzer may further identify data of a first and a second transaction from the plurality of transactions. Transaction replication logic operatively coupled to the signal analyzer may generate a replicate transaction from the first transaction in response to the signal analyzer identifying the data of the first transaction, the replicate transaction to be stored in a memory. An interrupt generator operatively coupled to the signal analyzer may send an interrupt to the processor in response to the signal analyzer identifying at least the data of the second transaction, the processor to halt the execution of transactions and to pass control of execution of the second transaction to a debugging module in response to receiving the interrupt. |
