发明名称 Surrogate Circuit For Testing An Interface
摘要 A semiconductor die includes interface logic for performing a function on an external device, and a surrogate circuit in communication with the interface logic. The interface logic facilitates testing of the interface logic by attempting to perform the function on the surrogate circuit. The interface logic may be a memory interface, and the surrogate circuit may be a memory circuit that is a smaller and simpler replica of an external memory die. The surrogate circuit allows the interface logic to be tested before the semiconductor die is physically coupled to the external device, for exampled in a three dimensional (3D) integrated circuit (IC).
申请公布号 US2011320894(A1) 申请公布日期 2011.12.29
申请号 US20100824783 申请日期 2010.06.28
申请人 CHUN CHRISTOPHER KONG YEE;SRINIVASAN ANAND;QUALCOMM INCORPORATED 发明人 CHUN CHRISTOPHER KONG YEE;SRINIVASAN ANAND
分类号 G01R31/3177;G06F11/25 主分类号 G01R31/3177
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