发明名称 OPTIMIZING EDRAM REFRESH RATES IN A HIGH PERFORMANCE CACHE ARCHITECTURE
摘要 Optimizing refresh request transmission rates in a high performance cache comprising: a refresh requestor configured to transmit a refresh request to a cache memory at a first refresh rate, the first refresh rate comprising an interval, the interval comprising receiving a plurality of first signals, the first refresh rate corresponding to a maximum refresh rate, and a refresh counter operatively coupled to the refresh requestor and configured to reset in response to receiving a second signal, increment in response to receiving each of a plurality of refresh requests from the refresh requestor, and reset and transmit a current count to the refresh requestor in response to receiving a third signal, wherein the refresh requestor is configured to transmit a refresh request at a second refresh rate, in response to receiving the current count from the refresh counter and determining that the current count is greater than a refresh threshold.
申请公布号 US2011320701(A1) 申请公布日期 2011.12.29
申请号 US20100822830 申请日期 2010.06.24
申请人 BRONSON TIMOTHY C.;FEE MICHAEL;O'NEILL, JR. ARTHUR J.;SWANEY SCOTT B.;INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 BRONSON TIMOTHY C.;FEE MICHAEL;O'NEILL, JR. ARTHUR J.;SWANEY SCOTT B.
分类号 G06F12/00;G06F12/08 主分类号 G06F12/00
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