OPTIMIZED FLASH MEMORY WITHOUT DEDICATED PARITY AREA AND WITH REDUCED ARRAY SIZE
摘要
A method and system for optimizing flash memory without dedicated parity area and with reduced array size. The memory size of a multi level cell (MLC) flash is reduced and controller operation is simplified. Simplified operation includes the controller being able to program each host data page to an integer number of flash pages. A maximal available information bits per cell (IBPC) is maintained in a flash device while also maximizing the programming throughput of the flash. Features include the ability to dynamically select which number of cell states is used by flash memory cells.
申请公布号
WO2011161622(A1)
申请公布日期
2011.12.29
申请号
WO2011IB52706
申请日期
2011.06.21
申请人
SANDISK IL LTD.;SHARON, ERAN;ALROD, IDAN;LITSYN, SIMON