发明名称 Efficient power region checking of multi-supply voltage microprocessors
摘要 A improved method for very-early validation of voltage region physical power distribution networks uses initial floor plan and early power grid data to identify physical power connection problems associated with voltage regions defined in multi-supply voltage microprocessor chip designs. Since all checking algorithms are floor plan-based and do not require complete circuit data, they are executable very early in the design phase. As a result, power region-related problems can be resolved much sooner than by using conventional full-chip physical design checking and power grid analysis methods.
申请公布号 US8086980(B2) 申请公布日期 2011.12.27
申请号 US20080032276 申请日期 2008.02.15
申请人 VOGEL DIEU Q. PHAN;INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 VOGEL DIEU Q. PHAN
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
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