发明名称 |
Decoding apparatus and decoding method |
摘要 |
A decoding apparatus and method are capable of decoding LDPC codes with a high degree of precision while preventing the circuit scale of the decoding apparatus from increasing. A computation section carries out a first computation process corresponding to three check-node processes by making use of decoding intermediate results supplied from a decoding intermediate result storage memory by way of a cyclic shift circuit, and stores the result of the first computation process in a decoding intermediate result storage memory. A computation section carries out a second computation process corresponding to six variable-node processes by making use of decoding intermediate results supplied from a decoding intermediate result storage memory by way of a cyclic shift circuit, and stores the decoding intermediate result in the decoding intermediate result storage memory. |
申请公布号 |
US8086934(B2) |
申请公布日期 |
2011.12.27 |
申请号 |
US20060912481 |
申请日期 |
2006.04.20 |
申请人 |
YOKOKAWA TAKASHI;MIYAUCHI TOSHIYUKI;SHINYA OSAMU;SONY CORPORATION |
发明人 |
YOKOKAWA TAKASHI;MIYAUCHI TOSHIYUKI;SHINYA OSAMU |
分类号 |
H03M13/00 |
主分类号 |
H03M13/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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