发明名称 Voltage Spike Protection for Power DMOS Devices
摘要 A power device includes a power transistor, a capacitor with a first plate coupled to a ground node and a second plate separated from the first plate by an insulator, a first plurality of wires coupling a drain node of the power transistor to the second plate of the capacitor, a second plurality of wires coupling the second plate of the capacitor to a DC supply node, and a voltage clamping device coupled in parallel with the capacitor. The voltage clamping device is operable to limit the voltage at the second plate of the capacitor to a value below a breakdown voltage of the power transistor.
申请公布号 US2011309872(A1) 申请公布日期 2011.12.22
申请号 US20100817869 申请日期 2010.06.17
申请人 BLAIR CYNTHIA;BRECH HELMUT 发明人 BLAIR CYNTHIA;BRECH HELMUT
分类号 H03L5/00;H05K3/30 主分类号 H03L5/00
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