发明名称 APPARATUS AND METHOD FOR INSTRUCTION ISSUE CONTROL
摘要 <P>PROBLEM TO BE SOLVED: To provide a multi-thread processor capable of executing multiple threads in which a thread or an instruction is selected to improve a throughput of the multi-thread processor. <P>SOLUTION: An instruction issue control apparatus 220 provided in a multi-thread processor includes a resource management part 210 that manages stall information indicating whether or not each running thread is in a stall state, a thread selection part 206 that selects threads that are not in a stall state out of the running threads, and an instruction issue control part 204 that controls the selected threads to issue instructions simultaneously. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2011258147(A) 申请公布日期 2011.12.22
申请号 JP20100134528 申请日期 2010.06.11
申请人 PANASONIC CORP 发明人 YAMANA TOMOHIRO
分类号 G06F9/38;G06F9/46 主分类号 G06F9/38
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