发明名称 Logic-Based Multiple Time Programming Memory Cell
摘要 A non-volatile memory system includes one or more non-volatile memory cells. Each non-volatile memory cell comprises a floating gate, a coupling device, a first floating gate transistor, and a second floating gate transistor. The coupling device is located in a first conductivity region. The first floating gate transistor is located in a second conductivity region, and supplies read current sensed during a read operation. The second floating gate transistor is located in a third conductivity region. Such non-volatile memory cell further comprises two transistors for injecting negative charge into the floating gate during a programming operation, and removing negative charge from the second floating gate transistor during an erase operation. The floating gate is shared by the first floating gate transistor, the coupling device, and the second floating gate transistor, and extends over active regions of the first floating gate transistor, the coupling device and the second floating gate transistor.
申请公布号 US2011310669(A1) 申请公布日期 2011.12.22
申请号 US20100818095 申请日期 2010.06.17
申请人 CHING WEN-HAO;WANG SHIH-CHEN;YANG CHING-SUNG 发明人 CHING WEN-HAO;WANG SHIH-CHEN;YANG CHING-SUNG
分类号 G11C16/04 主分类号 G11C16/04
代理机构 代理人
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